Position Summary
The
Package Designer
is responsible for product and tooling design.
Candidates with wafer bumping, WLCSP, BGA or fanout packaging experience are encouraged to apply for this position.
Responsibilities
With reference to internal design guidelines, work with the internal & external customer to:
- Generate, update, and revise electrical routing layout based on the netlist or design provided by external customers.
- Generate test vehicle design and the related PCB design.
- Prepare design risk assessment report.
- Generate reticle and stencil design.
- Generate other schematics or drawing as requested.
Review, maintenance and update the design guidelines.
Manage the conversion of internal design into suppliers’ final design.
Document all the drawing revisions and change records.
Support audits
Any other ad-hoc duties as assigned
Requirements
Master’s Degree in electrical/ electronics engineering, or similar discipline
Good understanding on the design guidelines and familiar in generating risk assessment report based on Fan-in/ Fan-out process capability
Experience of using Cadence APD in RDL routing and mask design for wafer-level processes including Wafer bumping, WLCSP, BGA, eWLB and other fan-out processes will be an advantage
Hands-on skills on design software tools like Linkcad, Cadence, CAM350, AutoCAD, GDS, Gerber editors
Experience with PCB test board design
Fresh graduates are welcome to apply
Silicon Box Pte Ltd is one of Asia’s fastest growing technology unicorn, at the forefront of semiconductors integration, emerging from the new horizon of Chiplets integration trends in the semiconductor industry, driven by the needs of "dis-integration", benefits of faster time-to-market and lower cost of new device design.
We provide services of semiconductor design of Chiplets at the leading edge of semiconductor device integration scheme with the next generation of advanced packaging manufacturing technologies.