- River Valley Central Region (Singapore) Singapore
Full Time Senior IC Logic Design - STA Engineer Jobs, Salary up to SGD 12,000 in FOCALTRANS PTE. LTD. Central Region (Singapore) - Maukerja
Senior IC Logic Design - STA Engineer
FOCALTRANS PTE. LTD.
Share
Save
Working Location
Job Description
Responsibilities
Job Responsibilities
Responsible for
logic synthesis, LEC and ECO implementation
, as well as quality control throughout the development process. Work closely with the front-end design team to establish timing constraints and ensure timely timing closure.
Responsible for
full-chip STA execution and timing constraint quality control
, working closely with the back-end design team to complete
timing sign-off
.
Job Requirements
Bachelor’s degree or above in
Computer Engineering, Electrical/Electronic Engineering, Communications Engineering
or a related discipline, with
8+ years of relevant industry experience
.
Strong proficiency in
SDC
and hands-on experience with
Design Compiler (DC), Formality and PrimeTime (PT)
, with solid
Tcl scripting
skil
Responsible for
logic synthesis, LEC and ECO implementation
, as well as quality control throughout the development process. Work closely with the front-end design team to establish timing constraints and ensure timely timing closure.
Responsible for
full-chip STA execution and timing constraint quality control
, working closely with the back-end design team to complete
timing sign-off
.
Job Requirements
Bachelor’s degree or above in
Computer Engineering, Electrical/Electronic Engineering, Communications Engineering
or a related discipline, with
8+ years of relevant industry experience
.
Strong proficiency in
SDC
and hands-on experience with
Design Compiler (DC), Formality and PrimeTime (PT)
, with solid
Tcl scripting
skil
Important Information
Never provide your bank or credit card details when applying for jobs. Do not transfer any money or complete unrelated online surveys. If you see something suspicious, Report this Job ad.
Learn More