Breakthrough on cost reduction and optimization methodology & process through big data analytic/4IR such as House of Cost, Cost Entitlement/Zero Based Budgeting, VPT.
Successfully achieve short & long-term cost management goal for assigned area (SDSM SiP / SSD Operation).
Perform cost related analysis to identify continuous cost improvement opportunities.
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Responsible for influencing package and product design by addressing the structural integrity and reliability issues in particular and advancing the technology of semiconductor packaging in general. The scope is to address all mechanical aspects of packaging technology and associated material and process interactions. The focus will be on solutions to meet increased demands for small form factor packages with thinner chips, denser interconnects, higher power, and higher reliability.
Responsible for the modeling and simulation, design of experiment, and testing, whichever comes first for best engineering practice, of mechanical responses of IC package and flash products including solid state drives.
This position will interface with package & product design, electrical and physical characterization, reliability testing, failure analysis, assembly R&D and other process teams.
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