Job Summary: This augmented engineering role delivers the network component of Client’s Service Management (ESM) onboarding onto ServiceNow. The engineers will drive network discovery, CMDB validation and onboarding of the 450+ device estate, ensuring accurate, trustworthy configuration data underpins service management and operational processes.
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This augmented engineering role delivers the network component of Client’s Service Management (ESM) onboarding onto ServiceNow. The engineers will drive network discovery, CMDB validation and onboarding of the 450+ device estate, ensuring accurate, trustworthy configuration data underpins service management and operational processes.
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Architecture specifications for the SoC’s peripheral subsystems: micro-architecture definition, flow and sequence diagrams, power and performance models, and pseudocode — the documents RTL design and verification teams implement from
Off-die interface definition — modes, electrical and protocol behavior, and integration requirements that account for boards, cables, connectors, PHYs, and the software driver model
Debug at RTL and gate level with the design team when implementation raises questions the specification must answer
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Our client is a leading startup in the semiconductor field and a leader in designing ultra low-power microprocessors. You will be in a team in Singapore to work with our SoC design, software development, design verification, and system test teams as our primary internal customers for the FPGA images.