Perform analog circuit block, subsystem and top-level layout and verification using state-of-the art tools (Cadence Virtuoso--VXL) and techniques.
Participate in layout design of Analog circuits (block/IP/chip) floor planning from scratch, performing routing & layout verification and resolve violations.
Perform analog circuit block, subsystem and top-level layout and verification using state-of-the art tools (Cadence Virtuoso--VXL) and techniques.
Participate in layout design of Analog circuits (block/IP/chip) floor planning from scratch, performing routing & layout verification and resolve violations.