Skyechip Sdn Bhd
201-500 Employees · Electrical & Electronics ·
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Skyechip Sdn Bhd Careers and Job Vacancies
Expired Jobs
- Strong digital design foundation with experience in RTL design using hardware description languages such as Verilog or SystemVerilog, and familiarity with micro-architecture development for complex IP or SoC components.
- Competence in verification and validation, including testbench development, simulation-based verification, functional coverage, and debugging of IP or SoC designs using industry-standard EDA tools.
- Understanding of ASIC and SoC design flows, including synthesis, timing analysis, DFT concepts, and collaboration with physical design teams to meet performance, power, and area goals. ...
Posted
a month ago
Malaysia
- Lead, mentor, and grow a high-performing emulation/prototyping team.
- Manage resource planning, staffing, performance management, and career development.
- Establish engineering best practices, methodologies, and continuous improvement initiatives. ...
Posted
a month ago
Malaysia
- Location (on-site): Malaysia (Penang)
- Click on the link to APPLY: https://lnkd.in/gg595AaK
- Role Summary ...
Posted
3 months ago
Malaysia
- Location (on-site): Malaysia (Penang)
- Click on the link to APPLY: https://lnkd.in/gg595AaK
- Role Summary ...
Posted
3 months ago
- Job Summary
- We are looking for an experienced Senior Validation Engineer to lead the functional verification and validation of complex SoC/IP designs. The ideal candidate will be responsible for defining the verification strategy, developing comprehensive verification plans, driving UVM-based verification environments, and ensuring high-quality silicon through thorough functional validation.
- Key Responsibilities ...
Posted
3 months ago
George Town
- Apply via SKYECHIP Job Portal: https://forms.office.com/r/CZk7PBjXjd
- For more positions, visit SkyeChip Linkedin: https://www.linkedin.com/company/skyechip
- The Supply Chain Manager is responsible for managing the end-to-end supply of engineering samples and prototype builds, supporting IC design and validation activities. This role focuses on material readiness, supplier coordination, and execution of sample build cycles across PCB vendors, component suppliers, OSATs, and interposer vendors. ...
Posted
3 months ago
George Town
- Location (on-site): Malaysia (Penang)
- Click on the link to APPLY: https://lnkd.in/gg595AaK
- Role Summary ...
Posted
3 months ago
Malaysia
- We are seeking a Physical Design Lead to own and drive the end-to-end physical implementation of testchips and high-speed interface subsystems such as DDR/LPDDR PHY, HBM PHY, and UCIe from netlist through tape-out ready GDSII on leading-edge process nodes. This is a technical lead role: candidate is expected to take full ownership of implementation scope, mentor junior PD engineers, define methodology, and drive cross-functional coordination with RTL design, DFT, analog/custom layout, and verification teams. Seniority level to be determined by experience.
- Key Responsibilities
- • Own end-to-end physical implementation of assigned testchip or high-speed interface subsystem(DDR/LPDDR, HBM, UCIe, or equivalent): floorplanning, power grid design, placement, clock tree synthesis(CTS), routing, and chip finishing through to GDSII stream-out. ...
Posted
4 months ago
Malaysia
- We are seeking a highly skilled and motivated Senior or Lead Emulation and Prototyping Engineer to define and lead emulation strategies for IP, complex SoC and system-level projects. This role requires a strong technical leader who can work independently, while also collaborating closely with system architects and pre-silicon verification teams to drive successful pre-silicon validation, firmware development, and early software enablement using industry-leading emulation/prototyping platforms.
- Key Responsibilities:
- •Define and lead the emulation and prototyping strategy for IP & SoC programs to support architectural validation, functional verification, and software bring-up. ...
Posted
5 months ago
- We are seeking an eFUSE Design Engineer to own the end-to-end development of production-grade eFUSE IP on leading-edge process nodes. You will drive eFUSE array architecture, circuit design, full simulation-based verification, collateral and view generation, and quality checks — delivering robust, sign-off-ready eFUSE IP to downstream SoC integration flows. Bitcell-level design knowledge is valued; direct bitcell design experience is a plus but not required. Seniority level to be determined by experience.
- Key Responsibilities
- • Design and architect the eFUSE array circuit, including sense amplifier, reference bias, programming current control, address decoder, column multiplexer, and repair logic; ensure correct functional operation across all PVT corners. ...
Posted
5 months ago