Key Responsibilities:
Perform middle-end IC design tasks:
Create optimized gate-level netlists
Develop and validate SDC constraints
Support DFT and power intent (UPF)
Perform formal equivalence checks and Static Timing Analysis (STA)
Assist with floorplanning and clock tree design
Implement and validate ECOs
Improve IC design flows and methodologies.
Take on tasks as assigned to support smooth business operations.
Adapt to changes as the business evolves.
Requirements:
Bachelor’s or Master’s degree in Electrical/Electronic Engineering
5+ years of experience in digital IC design
Skilled with EDA tools (e.g. Synopsys, Cadence)
Experience with graphics processors or microcontrollers is a plus
If interested, please submit your application with your expected salary and resume.
We regret that only short-listed candidates will be contacted shortly. By submitting your application or resume, you agree to the collection, use, retention, and sharing of your personal information with potential employers for their assessment.
JDA WMS Pte Ltd | EA Personnel: Pham Thi Tuyet Mai
EA License No: 23S1595 | EA Registration No: R25127838
JDA WMS is a global leader in the world of recruitment and matching systems. Leveraging cutting-edge technologies, we bridge the gap between candidates' aspirations and organizations' needs. Our unparalleled expertise lies in delivering bespoke solutions, ensuring impeccable candidate job alignment.
With a strong emphasis on diversity, quality, and innovation, JDA WMS stands at the forefront of transforming recruitment landscapes worldwide, making every match count.
Website: *************
Phone: +************* 6568
If interested, please submit your application to ************* with your expected salary and resume.