- Yishun North Region (Singapore) Singapore
Full Time Manager-Senior Manager (NPI) Jobs, Salary up to SGD 12,000 in STATS ChipPAC Pte. Ltd. North Region (Singapore) - Maukerja
Share
Save
Working Location
Job Description
Responsibilities
Purpose of the Job
(Why the job exists):
Lead team of NPI Staff/Senior/Engineers/Associate Engineers on:
New design reviews and checks against existing package design rules.
Supporting new product/customer feasibility build, characterization and qualifications.
Liaise with customers, TPM, PTM on engineering build support with regular conferences calls & meetings.
Undertake technology/project transfer from R&D to Operations.
Process optimization and improvements in eWLB technology.
Taking the lead for risk assessment, FMEA, optimization/DOE (if required) for new products.
Taking the lead in coordination with the various operation and support teams (mfg, process, equipment, mfg system, IE, CS etc) in preparing the line for new device startup/ramp. Ensure Excursion Free ramp.
Taking the lead for issues that arises from engineering builds.
Documentation of product eNPI phase/qual reports.
Supporting new customer engagement and fab visits.
Key Job Accountabilities
(Actual daily deliverables):
Set up and track KPIs for department to ensure successful qualification.
Ensure timely delivery of all NPI lots.
Ensure excursion free ramp of all NPIs.
Train and develop team on Process Characterization Techniques using Statistical methods.
Liaise with R&D on technology transfers, new products.
Required Experience and Qualifications:
Requires B. Eng, B. Sc, M. Eng, M. Sc or PhD in Electrical, Electronics, Mechanical, Chemical Engineering, Physics, Material Science or its equivalent.
Minimum 5 years working experience in Wafer Fab or Bump Fab.
Minimum 3 years working at Management level.
Join a leader in the industry!
STATS ChipPAC, a member of the JCET Group, is the world’s leading integrated-circuit manufacturing and technology services provider, offering a full range of turnkey services encompassing semiconductor package integration design and characterization, R&D, wafer probe, wafer bumping, package assembly, final test and drop shipment to customers around the world. Ranked as the third largest Outsourced Semiconductor Assembly and Test (OSAT) company, opportunities abound in growth and development as we continue to push towards new heights in this highly competitive field. Our comprehensive portfolio covers a wide spectrum of semiconductor applications servicing the telecommunications, consumer, automotive and other industries through advanced wafer level packaging, 2.5D/3D, System-in-Packaging, and reliable flip chip and wire bonding technologies. Our global footprint spans over 2 top-notched R&D facilities and 6 manufacturing locations in the Asia Pacific region, with global sales outreach as our sales network provide close technology collaboration and efficient supply-chain manufacturing to our global customers.
Join us and expand your world.
(Why the job exists):
Lead team of NPI Staff/Senior/Engineers/Associate Engineers on:
New design reviews and checks against existing package design rules.
Supporting new product/customer feasibility build, characterization and qualifications.
Liaise with customers, TPM, PTM on engineering build support with regular conferences calls & meetings.
Undertake technology/project transfer from R&D to Operations.
Process optimization and improvements in eWLB technology.
Taking the lead for risk assessment, FMEA, optimization/DOE (if required) for new products.
Taking the lead in coordination with the various operation and support teams (mfg, process, equipment, mfg system, IE, CS etc) in preparing the line for new device startup/ramp. Ensure Excursion Free ramp.
Taking the lead for issues that arises from engineering builds.
Documentation of product eNPI phase/qual reports.
Supporting new customer engagement and fab visits.
Key Job Accountabilities
(Actual daily deliverables):
Set up and track KPIs for department to ensure successful qualification.
Ensure timely delivery of all NPI lots.
Ensure excursion free ramp of all NPIs.
Train and develop team on Process Characterization Techniques using Statistical methods.
Liaise with R&D on technology transfers, new products.
Required Experience and Qualifications:
Requires B. Eng, B. Sc, M. Eng, M. Sc or PhD in Electrical, Electronics, Mechanical, Chemical Engineering, Physics, Material Science or its equivalent.
Minimum 5 years working experience in Wafer Fab or Bump Fab.
Minimum 3 years working at Management level.
Join a leader in the industry!
STATS ChipPAC, a member of the JCET Group, is the world’s leading integrated-circuit manufacturing and technology services provider, offering a full range of turnkey services encompassing semiconductor package integration design and characterization, R&D, wafer probe, wafer bumping, package assembly, final test and drop shipment to customers around the world. Ranked as the third largest Outsourced Semiconductor Assembly and Test (OSAT) company, opportunities abound in growth and development as we continue to push towards new heights in this highly competitive field. Our comprehensive portfolio covers a wide spectrum of semiconductor applications servicing the telecommunications, consumer, automotive and other industries through advanced wafer level packaging, 2.5D/3D, System-in-Packaging, and reliable flip chip and wire bonding technologies. Our global footprint spans over 2 top-notched R&D facilities and 6 manufacturing locations in the Asia Pacific region, with global sales outreach as our sales network provide close technology collaboration and efficient supply-chain manufacturing to our global customers.
Join us and expand your world.
Important Information
Never provide your bank or credit card details when applying for jobs. Do not transfer any money or complete unrelated online surveys. If you see something suspicious, Report this Job ad.
Learn More