The incumbent will be part of a design team involved in designing analog integrated circuits and developing Intellectual Property for our customers as well as for our internal IP library using advance CMOS, BiCMOS andDMOS technology. The scope of the job involves understanding customer requirements and specifications, developing concepts and plans for circuit level implementation, design capture and simulation. The designer will also be involved in laying out of the IC with Layout Designers to make it suitable for foundry processing. When the IC has been fabricated and assembled into IC products, the designer is expected to run laboratory experiments using test equipment to verify their designs and make improvements before delivery of solutions to our customers.
Utilize commercial and in-house EDA tools (e.g. Synopsys, Cadence, Siemens) for the design and implementation of 400 : 800 million gate integrated circuits in 7nm/5nm/3nm/2nm process technologies.
Utilize commercial and in-house EDA tools (e.g. Synopsys, Cadence, Siemens) for the design and implementation of 100 : 400 million gate integrated circuits in 7nm/5nm/3nm/2nm process technologies.
Utilize commercial and in-house EDA tools (e.g. Synopsys, Cadence, Siemens) for the design and implementation of 100 : 400 million gate integrated circuits in 7nm/5nm/3nm/2nm process technologies.
Utilize commercial and proprietary EDA tools (e.g., Synopsys, Cadence, Siemens) to design and implement integrated circuits with 100 to 400 million gates in 7nm, 5nm, 3nm, and 2nm process technologies
Use industry standard electrical design tools to design, simulate, and verify board level analog circuits for test and measurement applications, including: Linear power supplies