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Design Engineer Jobs in Pulau Pinang - September 2026 - Urgent Hiring
Showing 183 jobs results for
"design engineer"
in Pulau Pinang
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Undisclosed
George Town
- To lead technically in ASIC design implementation domain, which may include stages from design architectural understanding till timing signoff for tapeout
- To develop and signoff I.C. design projects RTL2GDS implementation and flow improvement.
- Architectural and micro-architectural intent understanding ...
Posted
2 days ago
Undisclosed
Malaysia
- Support project teams: Provide technical support to project teams in Singapore, assisting them in using the Infineon Design System (Flows, Design Packages, and Methodologies) for analog IPs development. Serve as the initial point of contact for any issues that arise, promptly addressing and resolving them.
- Problem-solving and collaboration: Take ownership of support topics and proactively find solutions. Collaborate with DES teams globally and EDA tool vendors to resolve issues within the Infineon Design Systems
- Foster effective communication and coordination with IT and the Global License Management team to ensure adequate IT resources and licenses are provided based on project needs. ...
Posted
13 days ago
Undisclosed
George Town
- To lead technically in ASIC design implementation domain, which may include stages from design architectural understanding till timing signoff for tapeout
- To develop and signoff I.C. design projects RTL2GDS implementation and flow improvement.
- Architectural and micro-architectural intent understanding ...
Posted
23 days ago
Undisclosed
George Town
- To lead technically in ASIC design implementation domain, which may include stages from design architectural understanding till timing signoff for tapeout
- To develop and signoff I.C. design projects RTL2GDS implementation and flow improvement. Responsibilities include (as applicable)
- Architectural and micro-architectural intent understanding ...
Posted
24 days ago
Undisclosed
Malaysia
- Develop and maintain automated signoff flows for layout extraction
- Perform Parasitic Extraction (PEX) using industry tools
- Work with tools such as Siemens Calibre or Synopsys StarRC ...
Posted
6 days ago
Undisclosed
- Will be part of a team that handles Verification for complex IP’s and close the Verification to the challenging milestones.
- IP Verification: VR creation as per the chip requirements and UVM/OVM Test benches creation
- Support in building verification infrastructure at the chip level as per the requirements ...
Posted
6 days ago
Undisclosed
Malaysia
- Be part of a team verifying complex IPs and driving them to closure against challenging milestones.
- Build verification environments and UVM/OVM testbenches based on chip requirements.
- Work across RTL, power-aware, and gate-level verification. ...
Posted
6 days ago
Undisclosed
Malaysia
- Position: Design Verifcation Engineer
- Location: Penang, Malaysia
- No of positions: 6 ...
Posted
12 days ago
Undisclosed
Malaysia
- Extraction (StarRC),
- Layout verification (Calibre), and /or
- Custom design construction (Virtuoso) backgrounds. ...
Posted
15 days ago
Undisclosed
Malaysia
- Strong proficiency in design verification methodologies, including test planning, coverage analysis, and defect tracking.
- Experience with hardware description and verification languages (e.g., Verilog/SystemVerilog, VHDL, UVM or similar frameworks).
- Hands-on skills with simulation and verification tools (e.g., industry-standard EDA tools for RTL simulation, formal verification, and regression management). ...
Posted
13 days ago
Undisclosed
Malaysia
- Perform pre-Si verification on various IP blocks and full-chip of FPGA/ASIC designs.
- The job scope includes test plan definition, SystemVerilog/UVM test bench and content development, debugging and running regression to deliver good-quality design.
- Candidate will work closely with team and interact with product/IP architect, logic design engineer, DFX owner, and design automation engineer to ensure high quality design validation. ...
Posted
2 days ago
Undisclosed
Malaysia
- As a Packaging Engineer, you will work in the Packaging R&D group on thermal designs across semiconductor packaging level, flash product printed circuited board assembly (PCBA) level, and host level.
- The ideal candidate will be responsible for thermal modeling (CFD) and validation of flash products PCBA using analytical/numerical analysis and measurement techniques.
- The focus will be on solutions to meet increased demands for small form factor packages with constrained physical and thermal environments. ...
Posted
10 hours ago
Undisclosed
George Town
- Develop and execute verification plans for PCIe IP/SoC designs.
- Create and maintain SystemVerilog/UVM-based verification environments, testbenches, and test cases.
- Verify PCIe functionality across various protocol layers and ensure compliance with PCIe specifications. ...
Posted
15 days ago
Undisclosed
George Town
- Support systematic problem-solving methodologies to resolve complex product and process quality issues across the product lifecycle.
- Provide quality engineering assessment on cross-functional new product development teams, ensuring robust design inputs, verification and validation strategies and regulatory compliance.
- Drive the implementation and continuous improvement of risk management activities, including hazard analysis, fault tree analysis and FMEAs, ensuring alignment with ISO 14971 and internal standards. ...
Posted
6 days ago
Undisclosed
George Town
- Support systematic problem-solving methodologies to resolve complex product and process quality issues across the product lifecycle.
- Provide quality engineering assessment on cross-functional new product development teams, ensuring robust design inputs, verification and validation strategies and regulatory compliance.
- Drive the implementation and continuous improvement of risk management activities, including hazard analysis, fault tree analysis and FMEAs, ensuring alignment with ISO 14971 and internal standards. ...
Posted
6 days ago
Undisclosed
- Lead and own the physical design flow from RTL - GDSII for complex sub-systems consisting of several blocks.
- Drive floorplanning, power planning, placement, clock tree synthesis (CTS), routing and signoff (timing, IR, EM, DRC/LVS)
- Handle sub-system level PD and provide necessary feedback to full-chip owner. ...
Posted
20 days ago
Undisclosed
- Lead and own the physical design flow from RTL - GDSII for complex blocks.
- Drive floorplanning, power planning, placement, clock tree synthesis (CTS), routing and signoff (timing, IR, EM, DRC/LVS).
- Handle complex blocks including multiple blocks if required. ...
Posted
20 days ago
Undisclosed
Malaysia
- Will be part of a team that handles Verification for complex IP’s and close the Verification to the challenging milestones.
- IP Verification: VR creation as per the chip requirements and UVM/OVM Test benches creation
- Support in building verification infrastructure at the chip level as per the requirements ...
Posted
21 days ago
Undisclosed
George Town
- Understand design data flow and complexity, translating to physical design constraints and strategy for convergence with best PPA metrices.
- Strategize floor-planning options and experimentation, fine tune Place & Route for design specific needs and close timing requirement within given power envelope.
- Implement Low Power physical design flows and methodologies such as Power-Gating, Clock-Gating and MBR flows. ...
Posted
17 days ago
Undisclosed
George Town
- Understand design data flow and complexity, translating to physical design constraints and strategy for convergence with best PPA metrices.
- Strategize floor-planning options and experimentation, fine tune Place & Route for design specific needs and close timing requirement within given power envelope.
- Implement Low Power physical design flows and methodologies such as Power-Gating, Clock-Gating and MBR flows. ...
Posted
18 days ago
Undisclosed
- Responsibilities:
- Will be part of a team that handles Verification for complex IP’s and close the Verification to the challenging milestones.
- IP Verification: VR creation as per the chip requirements and UVM/OVM Test benches creation ...
Posted
a month ago
Undisclosed
Malaysia
- IP-Level Verification Planning: Analyze IP specifications and microarchitectural documents to define comprehensive verification strategies, mapping out which blocks require formal proofs and which require constrained-random testbenches.
- Formal Property Development: Develop explicit SystemVerilog Assertions (SVA) to mathematically prove corner-case control logic, state machines, and interface protocols within the IP.
- UVM Testbench Ownership: Build, maintain, and run block-level testbenches using SystemVerilog and UVM to verify deep data paths and complex traffic patterns. ...
Posted
2 days ago
Undisclosed
Malaysia
- As a Packaging Engineer, you will work in the Packaging R&D group on thermal designs across semiconductor packaging level, flash product printed circuited board assembly (PCBA) level, and host level.
- The ideal candidate will be responsible for thermal modeling (CFD) and validation of flash products PCBA using analytical/numerical analysis and measurement techniques.
- The focus will be on solutions to meet increased demands for small form factor packages with constrained physical and thermal environments. ...
Posted
22 days ago
Senior Mechanical Engineer – NPI - Automation Design Senior Mechanical Engineer – NPI - Automation Design
MY03 Agilent Technologies LDA Malaysia
Undisclosed
George Town
- Agilent Technologies Inc. in Penang is seeking a senior Mechanical/Mechatronics Engineer to drive mechanical design and development for our products.
- You will handle proposals, concept studies, detailed designs, analyses, and testing, while managing CAD data and BOM cost estimations. Responsibilities include leading design reviews, coordinating mechanical test cases, and conducting root cause analysis in both development and sustaining projects.
Posted
15 days ago
Undisclosed
Malaysia
- Define and manage system requirements across cross-functional interfaces
- Develop and maintain system schematic architecture, including mechanical, vacuum, thermal, exhaust, power distribution and automation concepts
- Lead structured risk assessments (FMEA) and drive preventive design decisions ...
Posted
a month ago
Undisclosed
Malaysia
- Define and manage system requirements across cross-functional interfaces
- Develop and maintain system schematic architecture, including mechanical, vacuum, thermal, exhaust, power distribution and automation concepts
- Lead structured risk assessments (FMEA) and drive preventive design decisions ...
Posted
a month ago
Undisclosed
Malaysia
- Develop and execute verification plans for Clock (CLK) and PLL IPs.
- Build and maintain SystemVerilog/UVM-based verification environments and testbenches.
- Create directed and constrained-random test cases to validate functionality and performance. ...
Posted
21 days ago
Undisclosed
Malaysia
- THE ROLE:
- As an IC CAD Engineer, you will be responsible for supporting physical verification and parasitic extraction in a custom design environment. You will work with senior CAD team members to verify existing setups for new technology enablement, improve current setups for a better user experience, and provide user support to meet design deliverable schedules. You will also be involved in evaluating and implementing new tool features. Your role will be pivotal in enhancing the efficiency and reliability of our custom CAD flows.
- THE PERSON: ...
Posted
a month ago
Undisclosed
Malaysia
- Develop and execute verification plans for PCIe IP/SoC designs.
- Build and maintain SystemVerilog/UVM verification environments.
- Develop directed and constrained-random test cases to achieve coverage goals. ...
Posted
a month ago
Undisclosed
- Leads the architecture, design and implementation of technical solutions in multiple market segments that meet customer and regulatory requirements.
- Collaborate closely with cross-functional teams, suppliers, and customers to develop world class products in highly regulated markets.
- Familiar with EE development processes & workflows to realize products on a PCBA and product/system level. ...
Posted
12 hours ago
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