Drive NAND development from pre-silicon (circuit simulation for stress/screen test method), 1st silicon to qualification from DPPM (Defective part per million) perspective.
Responsible for influencing package and product design by addressing the structural integrity and reliability issues in particular and advancing the technology of semiconductor packaging in general. The scope is to address all mechanical aspects of packaging technology and associated material and process interactions. The focus will be on solutions to meet increased demands for small form factor packages with thinner chips, denser interconnects, higher power, and higher reliability.
Lead and support advanced semiconductor research on bio-based, biodegradable, recyclable, and sustainable materials for electronic packaging applications, including SSD, Flash, and emerging storage products.
Lead and support advanced semiconductor research on bio-based, biodegradable, recyclable, and sustainable materials for electronic packaging applications, including SSD, Flash, and emerging storage products.
Develops SSD assembly and IC packaging material and processes to meet NBM new business model quality, reliability, cost, yield, productivity and manufacturing requirements.