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Noc Engineer Jobs in Pulau Pinang - August 2026 - Urgent Hiring
Showing 18 jobs results for
"noc engineer"
in Pulau Pinang
Never miss any updates for Noc Engineer jobs in Pulau Pinang
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MYR3,000 - MYR3,000 Per Month
Prai
- Cell phone reimbursement
- Flexible schedule
- Health insurance ...
Posted
18 days ago
MYR3,000 - MYR3,000 Per Month
Prai
- Cell phone reimbursement
- Flexible schedule
- Health insurance ...
Posted
18 days ago
Undisclosed
Malaysia
- Imprivata OneSign Support (Primary Focus):
- Serve as the primary administrator and operational owner of the Imprivata OneSign platform.
- Lead and support the implementation, configuration, and ongoing maintenance of Imprivata OneSign. ...
Posted
12 days ago
Undisclosed
Malaysia
- Defining and executing the overall functional test plan and verification strategy for GMDOFF features of AMD SOCs
- Driving innovation to enhance capabilities in validation including tool & script development and technical & procedural methodology improvements
- Debug of issues found during bring-up, validation, and production phases of SOC programs. Lead cross-functional issues debugging ...
Posted
16 days ago
Undisclosed
Malaysia
- Lead RTL design and implementation for AI chip SoC and subsystems.
- Own key modules such as AI accelerator control logic, DMA, NoC/interconnect, memory subsystem, die-to-die/chip-to-chip interfaces, register blocks, interrupt, clock/reset, and low-power control.
- Define microarchitecture, RTL partitioning, interfaces, and implementation plans. ...
Posted
16 days ago
Undisclosed
- Perform gate level netlist to GDS design independently including but not limited to floor planning, place & route, close tree synthesis, timing sign off and physical verification.
- Perform design IP Implementation, IR drop analysis, DFT, STA and foundry merge.
- Work with manager to achieve assigned tape out target. ...
Posted
2 days ago
Undisclosed
Malaysia
- Perform floorplanning, power planning, placement, CTS, routing, and timing closure.
- Analyze and fix setup/hold violations, signal integrity, IR-drop, and electromigration issues.
- Execute DRC, LVS, ERC, and antenna checks to achieve signoff-quality designs. ...
Posted
7 days ago
Undisclosed
Malaysia
- Perform end-to-end ASIC physical design from Netlist to GDSII.
- Execute floorplanning, partitioning, placement, routing, and Clock Tree Synthesis (CTS).
- Drive timing closure by resolving setup, hold, transition, and signal integrity issues. ...
Posted
10 days ago
Undisclosed
Malaysia
- Job Title: Principal Engineer – Physical Design
- Experience: 5–10 Years
- Qualification: B.E./B.Tech/M.E./M.Tech in Electronics, Electrical Engineering, or equivalent ...
Posted
10 days ago
Undisclosed
Malaysia
- Perform ASIC physical design from Netlist to GDSII.
- Handle floor planning, placement, clock tree synthesis (CTS), and routing.
- Perform timing closure and resolve setup/hold timing violations. ...
Posted
10 days ago
Undisclosed
George Town
- Job Title: Principal Engineer – Physical Design
- Experience: 5–10 Years
- Qualification: B.E./B.Tech/M.E./M.Tech in Electronics, Electrical Engineering, or equivalent ...
Posted
14 days ago
Undisclosed
- Drive full-chip and block-level physical implementation, including floorplanning, placement, clock tree synthesis (CTS), routing, and optimization.
- Perform timing closure across multi-corner, multi-mode (MCMM) conditions, ensuring compliance with performance, power, and area (PPA) goals.
- Conduct static timing analysis (STA) using PrimeTime or equivalent tools, including timing ECO implementation and signoff validation. ...
Posted
16 days ago
Undisclosed
- Perform gate level netlist to GDS design independently including but not limited to floor planning, place & route, close tree synthesis, timing sign off and physical verification.
- Perform design IP Implementation, IR drop analysis, DFT, STA and foundry merge.
- Work with manager to achieve assigned tape out target. ...
Posted
18 days ago
Undisclosed
Malaysia
- Must have Skills :
- Post silicon system validation or system engineering
- Experience DDR validation ...
Posted
18 days ago
Undisclosed
Malaysia
- Job Title: Principal Engineer – Physical Design
- Experience: 5–10 Years
- Qualification: B.E./B.Tech/M.E./M.Tech in Electronics, Electrical Engineering, or equivalent ...
Posted
18 days ago
Undisclosed
Malaysia
- Lead the physical design implementation of high-speed PHY IPs, including SerDes, DDR I/O, and other high-speed interface blocks.
- Own the complete RTL-to-GDSII physical design flow, including:
- Floorplanning ...
Posted
24 days ago
Undisclosed
Malaysia
- Location (on-site): Malaysia (Penang)
- Click on the link to APPLY: https://lnkd.in/gg595AaK
- Role Summary ...
Posted
23 days ago
Undisclosed
George Town
- Provides DDR technical leadership in the development of new test & validation features
- Closely interacts with silicon design (DRAM controller and memory Phy) in test execution & debug, as well as in feature definition for future product generation
- Writes comprehensive electrical & functional test plans for the memory validation of processors ...
Posted
a month ago
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