2,500+ Qa Qc Engineer Jobs - July 2026 - Urgent Hiring

Paparan 2,551 hasil carian kerja kosong untuk "qa qc engineer"
Jangan lepaskan peluang untuk kerja Qa Qc Engineer terkini!
SGD5,500 - SGD5,500 Sebulan

Singapore

  • Job Responsibilities:
  • • Responsible for Multi-Dies Physical Verification Sign-off in area of (3D_Stack, 3D_PERC, 3D_ANT) for tape-out.
  • • Co-work with Package Design Team to resolve multi-dies integration issues. ...
Posted
16 days ago
SGD5,500 - SGD5,500 Sebulan

Singapore

  • Responsible for Full-chip Physical Verification Sign-off in area of (DRC, LVS, ANT, ERC, ESD, PERC) for tape-out.
  • Co-work with Place & Route team to resolve full-chip layout integration issues.
  • Coordinates with internal IP owners on IP related issues. ...
Posted
16 days ago
SGD5,500 - SGD5,500 Sebulan

Singapore

  • Undertake the role of layout engineer for day-to-day project execution of a variety of layout design implementation, including but not limited to Foundation IP (IO/ESD), Analog IP and RFIC, across multiple process nodes and diversified foundries.
  • Collaborate with process-oriented or project-oriented multi-functional teams in delivering the physical design portion of IP, test-chip, RFIC or SoC.
  • Be the DRI (Directly Responsible Individual) for the tasks assigned and assume full responsibility of the complete layout implementation process, including floor planning layout construction, physical verification and QA flow sign-off. ...
Posted
16 days ago
SGD5,500 - SGD5,500 Sebulan

Singapore

  • IC physical design of 12nm/6nm/4nm and below world leading advanced process chip, from RTL to GDS.
  • Block owner, take block of 2~3 million instances, working on Synthesis/APR (auto place and route)/Signoff.
  • Block coordinator role for more than 5~10 blocks, solving the critical issue and give the solution to block owners. ...
Posted
16 days ago
SGD8,000 - SGD15,000 Sebulan

West

  • Responsible for advanced process high-performance/low-power customized IP (STD cell, Macro, SRAM...) circuit design.
  • Simulation, verification, and feature extraction of corresponding IP.
  • Guide layout design of relevant IP. ...
Posted
16 days ago
Undisclosed

KL City

  • Degree/Masters in Microelectronics, Material Science, Physics or equivalent.
  • Good technical knowledge of digital and analog circuit fundamentals as well as an understanding of the underlying semiconductor device physics and behavior.
  • Understanding of semiconductor packaging processing and able to conduct microscopic examination of failed component to analyze material composition and failure mechanism. ...
Posted
25 days ago
SGD8,000 - SGD8,000 Sebulan

Singapore

  • Responsible for advanced process high-performance/low-power customized IP (STD cell, Macro, SRAM...) circuit design.
  • Simulation, verification, and feature extraction of corresponding IP.
  • Guide layout design of relevant IP. ...
Posted
17 days ago

ZERO-ERROR SYSTEMS PTE. LTD.

SGD4,000 - SGD8,000 Sebulan

West

  • Development of analog integrated circuits (ICs) from specification to prototype
  • Schematic and layout design of analog ICs including pre- and post-simulations verifications
  • Testing and debugging of analog IC prototypes ...
Posted
17 days ago
SGD5,000 - SGD10,000 Sebulan

Singapore

  • Develop and Review Test Plan based on IC design specification
  • Develop constrained-Random verification environment for complex DUT
  • Develop/Modify Testbenches and test programmes using UVM-SV for Pre-Silicon IP/ICs/SOCs and ensure product meet their performance ...
Posted
17 days ago
SGD5,000 - SGD10,000 Sebulan

Singapore

  • Responsible for silicon function verification, performance optimization and silicon bring up
  • Responsible for bench characterization and validation of Silicon/ IP
  • · Debug and resolve silicon issues ...
Posted
17 days ago
Undisclosed
  • Job Title
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Posted
7 days ago
Undisclosed
  • Job Title
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Posted
7 days ago
SGD2,200 - SGD2,200 Sebulan

Singapore

  • Min Diploma in Chemistry or a related field of science.
  • Previous practical experience working in a laboratory environment with instruments such as HPLC, GC, FTIR, Stability management and autotitrations.
  • Position Summary: ...
Posted
20 days ago
Undisclosed
  • To assist the IQA Supervisor to ensure that IQA daily activities are carried out smoothly.
  • To ensure that the turnaround time for receiving inspection is done within the goal set by the IQA Supervisor.
  • Receiving inspection and data collection of incoming materials on FIFO basis. ...
Posted
20 days ago
Undisclosed
  • To assist the IQA Supervisor to ensure that IQA daily activities are carried out smoothly.
  • To ensure that the turnaround time for receiving inspection is done within the goal set by the IQA Supervisor.
  • Receiving inspection and data collection of incoming materials on FIFO basis. ...
Posted
20 days ago
SGD2,000 - SGD2,700 Sebulan

Singapore

Posted
a month ago
SGD9,000 - SGD9,000 Sebulan

Singapore

  • Design high-speed (>100MS/s) Successive Approximation Register (SAR) ADCs for applications like 5G, radar, and data converters.
  • Optimize critical blocks: capacitor DAC arrays, high-speed comparators, bootstrapped switches, and digital control logic.
  • Achieve target specifications: ENOB (Effective Number of Bits), SFDR (Spurious-Free Dynamic Range), power efficiency (FOM ...
Posted
3 days ago
SGD9,000 - SGD9,000 Sebulan

Singapore

  • Architecture choice-based noise/jitter/spur spec (optimal architecture - integer/Fraction/SS/MDLL etc.)
  • Derive system parameters (Loop BW, Noise margin, noise TF, spur reduction), system verification through behavioral to transistor model (Verilog-A, MATLAB, SpectreRF.
  • Design and verify key components: LC VCO, R-VCO, MMD, PFD, CP, LF, frac-N SDM, calibration engine and LDO. ...
Posted
3 days ago
Undisclosed

Singapore

  • Work on IP Design and Verification.
  • RTL Digital design.
  • IP and System Architecture definition. ...
Posted
3 days ago
Undisclosed
  • IP Design Engineer (RTL & Synthesis)
  • Location: Bayan Lepas, Penang, Malaysia
  • Job Type: Full-time (On-site) ...
Posted
3 days ago
SGD7,000 - SGD10,000 Sebulan

Downtown Core

  • Responsibility
  • Responsible for algorithms and logic design and verification related to ASIC/AI/CPU chips under advanced processes. 2. Responsible for chip testability design and related work. 3. Responsible for maintaining the IC development environment and tool processes for chips, as well as designing In-House EDA tools.
  • Requirement ...
Posted
3 days ago
Undisclosed

Singapore

  • Pursuing BS or MS in EE/CS or related fields.
  • Hardware engineering background with an emphasis in VLSI or Computer Architecture.
  • Exposure to Digital design or verification, VLSI design and circuits, Computer Architecture. ...
Posted
2 days ago
SGD7,000 - SGD7,000 Sebulan

Singapore

  • Create mixed-signal verification and coverage strategies tailored to complex IC designs, aligning with design architecture and specifications.
  • Construct verification testbenches using standard verification languages and methodologies, ensuring comprehensive coverage.
  • Author and execute test cases to validate mixed-signal circuits, focusing on functionality, performance, and reliability. ...
Posted
2 days ago
Undisclosed

George Town

  • The candidate will perform the physical design implementation, including floor planning, power grid design, place and route, clock tree synthesis, timing closure
  • The candidate will have the opportunity to work on many varieties of challenging designs, i.e. low power and high-speed designs at the latest technology nodes.
  • The responsibility of the candidate includes participating in or leading next generation physical design, methodology and flow development. ...
Posted
2 days ago
Undisclosed

Singapore

  • Work on Digital IP verification or SOC verification.
  • Verification planning, this includes vplan writing, functional points identification and review.
  • Multi languages testbench development. ...
Posted
a day ago
Undisclosed

Singapore

  • Design high-speed (>100MS/s) Successive Approximation Register (SAR) ADCs for applications like 5G, radar, and data converters.
  • Optimize critical blocks: capacitor DAC arrays, high-speed comparators, bootstrapped switches, and digital control logic.
  • Achieve target specifications: ENOB (Effective Number of Bits), SFDR (Spurious-Free Dynamic Range), power efficiency (FOM ...
Posted
21 hours ago
Undisclosed

Singapore

  • Architecture choice-based noise/jitter/spur spec (optimal architecture - integer/Fraction/SS/MDLL etc.)
  • Derive system parameters (Loop BW, Noise margin, noise TF, spur reduction), system verification through behavioral to transistor model (Verilog-A, MATLAB, SpectreRF.
  • Design and verify key components: LC VCO, R-VCO, MMD, PFD, CP, LF, frac-N SDM, calibration engine and LDO. ...
Posted
21 hours ago