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Responsible for the front-end design of SoC system and related modules (including MMU, Security, NoC, Coresight, etc.).
In charge of the design and application of basic modules such as processor MMU and SMMU. Follow ARM Virtual Memory System Architecture (VMSA) to handle memory access control under Secure and Non-secure states, as well as ASID and nG bit parsing.
Undertake SoC system bus design; proficient in using FlexNoC, NCore, NIC, DesignWare and other tools for system bus design and bandwidth evaluation.
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