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27 VLSI Jobs in Malaysia | Job Vacancies | July 2026 | Maukerja
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Undisclosed
- Work as an individual contributor to own any one task of RTL Design/Module and provide support to junior engineers in Verification/PD/DFT/Circuit Design/Analog Layout/STA/Synthesis/Design Checks/Signoff etc.
- Independently analyze and complete the assigned task in the defined domain(s) successfully and on-time
- On time quality delivery approved by the project lead/manager ...
Posted
10 days ago
Undisclosed
KL City
- Logic synthesis
- Timing design & verification
- DFT implementation & verification ...
Posted
11 days ago
Undisclosed
- Custom Layout Engineer
- Bayan Lepas, Penang
- Location: Bayan Lepas, Penang, Malaysia ...
Posted
3 days ago
SGD4,500 - SGD6,500 Sebulan
Singapore
- Job responsibilities
- Co-work with PDK team to code and maintain DRC/LVS/ANT/ERC/LPE/ESD rule deck for various processes.
- Responsible for Full-chip Physical Verification Sign-off in area of (DRC, LVS, ANT, ERC, ESD, PERC) for tape-out. ...
Posted
a day ago
Undisclosed
- Undertake the roles of a custom layout engineer in realizing the physical implementation of a variety of circuitries, including Foundation IP (Standard Cells, Memory Compilers, IO/ESD), Analog IP, and RF building blocks.
- Be responsible for tasks assigned and assume full responsibility of the complete layout implementation process, including floorplanning, layout construction, physical verification and QA flow sign-off.
- Provide timely project status updates and proactively anticipate potential execution pitfalls to ensure high-quality and on-time delivery for each project. ...
Posted
5 days ago
PICOHEART (SG) PTE. LTD.
SGD12,000 - SGD12,000 Sebulan
Singapore
- ResponsibilitiesTeam Introduction
- The Silicon Platform Team acts as the core R&D middleware group for chip development within the company. The team covers the full spectrum of the chip design flow, including Logic Synthesis, Design for Testability (DFT), Backend Design, Physical and STA (Static Timing Analysis) Signoff, as well as Power Integrity, IR drop, and Electromagnetic Compatibility (Power/IR/EM). The team also oversees tape-out, mass production, packaging, testing, and board-level verification. They collaborate closely with front-end chip teams across business units to drive R&D progress and mass production deployment for chip.
- Responsibilities ...
Posted
9 days ago
Undisclosed
Singapore
- Develop synthesizable RTL in Verilog/SystemVerilog for custom on-chip test, monitoring, and diagnostic IP targeting analog and mixed-signal failure detection.
- Design and verify digital logic blocks such as test controllers, sequencing logic, sensor/interface control logic, measurement and monitoring logic, data capture and comparison logic, and failure detection and reporting logic.
- Build clean register and bus-connected interfaces, for example APB, AHB, or AXI-lite based control and status paths, to enable firmware interaction and subsystem integration. ...
Posted
10 days ago
OMNIVISION TECHNOLOGIES SINGAPORE PTE. LTD.
SGD5,000 - SGD5,000 Sebulan
Singapore
- Develop synthesizable RTL in Verilog/SystemVerilog for custom on-chip test, monitoring, and diagnostic IP targeting analog and mixed-signal failure detection.
- Design and verify digital logic blocks such as test controllers, sequencing logic, sensor/interface control logic, measurement and monitoring logic, data capture and comparison logic, and failure detection and reporting logic.
- Build clean register and bus-connected interfaces, for example APB, AHB, or AXI-lite based control and status paths, to enable firmware interaction and subsystem integration. ...
Posted
11 days ago
SGD5,800 - SGD5,800 Sebulan
Singapore
- Netlist to GDSII at block level, Subsystem Level and at Full chip.
- Worked on multiple tapeouts on Netlist to GDSII
- Hierarchical partitioning and budgeting of block-level subsystems. ...
Posted
16 days ago
Senior Staff Engineer, Chip Design - Device Development Senior Staff Engineer, Chip Design - Device Development
OSRAM Opto Semiconductors (Malaysia) Sdn. Bhd., Penang
Undisclosed
- Designing, realization and evaluation of AlInGaN based semiconductor chips
- Special focus on innovative approaches towards high performance/high current LEDs
- Development of novel or optimized process flows for chip manufacturing in strong cooperation with process development and manufacturing in global teams ...
Posted
17 days ago
Undisclosed
Malaysia
- Lead RTL design and implementation for AI chip SoC and subsystems.
- Own key modules such as AI accelerator control logic, DMA, NoC/interconnect, memory subsystem, die-to-die/chip-to-chip interfaces, register blocks, interrupt, clock/reset, and low-power control.
- Define microarchitecture, RTL partitioning, interfaces, and implementation plans. ...
Posted
3 days ago
Undisclosed
Malaysia
- Synthesis, LEC, Low power checks, Memory BIST insertion, Constraints validation.
- Collaborate with RTL designers, physical design, and DFT teams to ensure early detection and resolution of issues related to synthesis, constraints, and timing.
- Communicate effectively with all stakeholders across the organization ...
Posted
19 days ago
Undisclosed
Singapore
- Work on IP Design and Verification.
- RTL Digital design.
- IP and System Architecture definition. ...
Posted
6 days ago
SGD11,250 - SGD11,250 Sebulan
Singapore
- About Us
- Founded in 2012, ByteDance's mission is to inspire creativity and enrich life. With a suite of more than a dozen products, including TikTok, Lemon8, CapCut and Pico as well as platforms specific to the China market, including Toutiao, Douyin, and Xigua, ByteDance has made it easier and more fun for people to connect with, consume, and create content.
- Why Join ByteDance ...
Posted
9 days ago
SGD6,500 - SGD6,500 Sebulan
Singapore
- About Us
- Founded in 2012, ByteDance's mission is to inspire creativity and enrich life. With a suite of more than a dozen products, including TikTok, Lemon8, CapCut and Pico as well as platforms specific to the China market, including Toutiao, Douyin, and Xigua, ByteDance has made it easier and more fun for people to connect with, consume, and create content.
- Why Join ByteDance ...
Posted
9 days ago
Undisclosed
Singapore
- Design high-speed analog circuits for DDR PHY interfaces (DDR4/DDR5/LPDDR5/6).
- Key modules: PLLs, DLLs, TX/RX channels, ODT (On-Die Termination), equalizers (CTLE/DFE), voltage regulators.
- Optimize power, performance, area (PPA), and signal integrity (SI). ...
Posted
10 days ago
SGD9,000 - SGD9,000 Sebulan
Singapore
- Design high-speed analog circuits for DDR PHY interfaces (DDR4/DDR5/LPDDR5/6).
- Key modules: PLLs, DLLs, TX/RX channels, ODT (On-Die Termination), equalizers (CTLE/DFE), voltage regulators.
- Optimize power, performance, area (PPA), and signal integrity (SI). ...
Posted
11 days ago
Undisclosed
Singapore
- Work on IP Design and Verification.
- RTL Digital design.
- IP and System Architecture definition. ...
Posted
11 days ago
Nanyang Technological University
Undisclosed
Singapore
- School of Electrical and Electronic Engineering is one of the founding Schools of the Nanyang Technological University. Built on a culture of excellence, the School is renowned for its high academic standards and research. With over 3,000 undergraduates students and 2,000 graduate students it is one of the largest EEE schools in the world and ranks 4th in the field of Electrical & Electronic Engineering in the 2025 QS World University Rankings by Subjects.
- Today, the School has become one of the world’s largest engineering schools that nurtures competent engineers and researchers. Each year, the School graduates over a thousand students who are ready to take on great ambitions and challenges.
- For more details, please view: https://www.ntu.edu.sg/eee ...
Posted
24 days ago
PERSOL SINGAPORE PTE. LTD.
SGD5,500 - SGD5,500 Sebulan
Singapore
- Undertake the role of layout engineer for day-to-day project execution of a variety of layout design implementation, including but not limited to Foundation IP (IO/ESD), Analog IP and RFIC, across multiple process nodes and diversified foundries.
- Collaborate with process-oriented or project-oriented multi-functional teams in delivering the physical design portion of IP, test-chip, RFIC or SoC.
- Be the DRI (Directly Responsible Individual) for the tasks assigned and assume full responsibility of the complete layout implementation process, including floor planning layout construction, physical verification and QA flow sign-off. ...
Posted
25 days ago
ASEM - Advanced Semiconductor Academy Of Malaysia
Undisclosed
- ASIC design methodologies and industry-standard design flow
- RTL design using Verilog HDL
- Functional verification with SystemVerilog ...
Posted
20 days ago
Undisclosed
Malaysia
- End-to-end physical design: Floorplan, PnR, CTS, routing
- Drive timing closure using STA (MCMM analysis)
- Fix setup/hold violations and optimize PPA (power, performance, area) ...
Posted
25 days ago
Microchip Technology Inc.
Undisclosed
George Town
- To lead technically in ASIC physical design domain, which may include stages from design specification understanding till layout and timing signoff for tapeout
- To develop and signoff I.C. design projects physical design and flow improvement. Responsibilities include (as applicable)
- Effective and efficient auto Place-and-Route implementation, covering floorplanning, PG mesh, placement, CTS, routing and chip-finishing ...
Posted
a month ago
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