Kerja Sepenuh Masa, FPGA Design Engineer di UST Pulau Pinang - Maukerja

Job Responsibilities

• Design, develop, and verify FPGA-based solutions for complex systems.
• Develop RTL designs using Verilog/SystemVerilog or VHDL.
• Perform FPGA synthesis, implementation, timing analysis, and debugging.
• Develop and execute simulation and hardware validation tests.
• Work with cross-functional teams to integrate FPGA designs with hardware and software.
• Debug and optimize FPGA designs for performance, timing, and resource utilization.

Requirements

• Bachelor's/Master's degree in Electrical/Electronics Engineering or related field.
• 4+ years of experience in FPGA/RTL design.
• Strong experience with Verilog/SystemVerilog or VHDL.
• Experience with FPGA tools
• Good understanding of digital design, timing constraints, and FPGA architecture.