jobs in UST Malaysia

Full Time FPGA-RTL Design Engineer (High Speed Ethernet) Jobs, in UST Malaysia Pulau Pinang - Maukerja

FPGA-RTL Design Engineer (High Speed Ethernet)

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Working Location

  • Bayan Lepas Pulau Pinang Malaysia

Job Description

Responsibilities

Role: FPGA Engineer


Overview

We are seeking talented and motivated FPGA Engineer to join our dynamic and growing organization that enable industry leaders to deliver products that leave positive impacts to the world.


Technical Competencies

  • Proficiency with HDL design such as Verilog, System Verilog, and VHDL.
  • Experience working with standard FPGA development tools for various vendors: Xilinx Vivado, Vitis / Quartus / Diamond, Radiant, etc.
  • Experience working with simulation tools such as ModelSim and / or QuestaSim
  • Familiar with various high-speed interfaces such as PCIe, Ethernet (L1 – L4), USB, DDR, LVDS, etc.
  • Familiar with various low speed interfaces such as SPI, I2C, UART, etc.


Preferred experiences

  • Experience FPGA/RTL design on High-Speed Ethernet
  • Knowledge in DSP design, simulation, and implementation is an added advantage.
  • Knowledge of RF chipset and product development is an added advantage.
  • Firmware/driver development knowledge is an added advantage.


Job Requirements

  • Bachelor degree in Electrical/Electronic engineering or equivalent.
  • Minimum 3-5 years of direct working experiences in FPGA HDL/IP design experience.
  • Fluent in both written and spoken English, ability to work in an international team.
  • Good team work attitude, collaboration and communication skills.
  • Willing to work in Bayan Lepas, Penang Malaysia.


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