Using a variety of bending machines, including manual and CNC machines, to form metal sheets and components according to blueprints and specifications.
Execute full-chip or block-level physical design for GPU/AI accelerator SoCs, from floorplanning to sign-off, optimizing for timing, power, and area (PPA) targets.
Perform gate level netlist to GDS design independently including but not limited to floor planning, place & route, close tree synthesis, timing sign off and physical verification.
Responsible for management, performance and completion of moderate to complex projects in administrative functions, including continuous process improvement projects.