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We are seeking a skilled and motivated RF Engineer with experience in Software Defined Radio (SDR) to contribute to the design, development, and implementation of RF Direction Finding (RFDF) systems. The ideal candidate will have hands-on expertise with SDR platforms and a solid understanding of RF signal processing, antenna arrays, and DF techniques.
Develop and integrate SDR-based RFDF systems for signal detection, classification, and direction finding.
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Plan, coordinate, and oversee the end-to-end implementation of talent development programmes, ensuring delivery meets approved scope, quality, budget, and timelines.
Develop programme implementation plans, schedules, resource requirements, and operational arrangements, and monitor progress to ensure timely and effective execution.
Lead, supervise, coach, and develop the Talent Development team; allocate workloads, monitor performance, and ensure effective collaboration and accountability.
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Develop, implement, and oversee strategic E&E programs in alignment with CREST’s mission.
Identify emerging technologies and research trends in semiconductors, advanced manufacturing, power technologies, electronics systems and devices, embedded systems, material, etc.
Formulate strategies to position CREST as a collaborative leader in E&E innovation and technology transfer.
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Understand and operate test lab equipment (prober, probe card analyzer, test benches, etc.) required for probe card characterization and optical inspection.
Define and execute statistical-proven experiments to determine probe wear-out rates, to stabilize contact resistance and to control tip diameter for various probe-pad-combinations of Infineon’s power and digital wafer technologies.
Track probe card performance at productive test sites and support them optimizing yield, extending lifetime and reducing maintenance cycle times.
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Understand and operate test lab equipment (prober, probe card analyzer, test benches, etc.) required for probe card characterization and optical inspection.
Define and execute statistical-proven experiments to determine probe wear-out rates, to stabilize contact resistance and to control tip diameter for various probe-pad-combinations of Infineon’s power and digital wafer technologies.
Track probe card performance at productive test sites and support them optimizing yield, extending lifetime and reducing maintenance cycle times.
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Drive NAND development from pre-silicon (circuit simulation for stress/screen test method), 1st silicon to qualification from DPPM (Defective part per million) perspective.
Own and achieve DPPM (Defective part per million) targets on SD NAND Technology in line with technology & product roadmaps.
Develop and define test strategy and test flow for SD NAND Technology on DOEs from dedicated Memory Health R&D line.
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