This position is responsible in determining, negotiating and agreeing on in-house quality procedures, standards and specifications, assessing customer requirements and ensuring that these are met.
Manage and supervise Quality Assurance Inspection including staff management, recruitment, training and development, work scheduling, disciplinary and Key-Index Performance
Plan, prepare and revise to ensure all development tasks meet quality criteria through planning, execution, quality assurance and issue tracking and to resolve customer and work issues or problems within own level of authority and communicate or escalate with concerned parties.
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Equipment Operation & Maintenance: Proficiently operate ICT testing machines, functional test fixtures, and automated testing equipment. Perform daily inspections and basic preventive maintenance.
Product Testing: Execute testing procedures according to work instructions and accurately determine test results as “Pass” or “Fail.”
Initial Troubleshooting: Conduct preliminary analysis on failed products to identify whether issues are caused by product defects or testing equipment/program problems, and report according to established procedures.
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Machinery & Equipment: Support multi-discipline manufacturing processes with respect to the repair, maintenance, installation and/or enhancement of a select group of machinery and equipment or interrelated systems.
Process/Product/Production: Provides technical support in the area of electronic or mechanical operations, tests, experiments and/or problem resolution associated with components, parts, products or processes/systems.
Test & Repair: Tests and calibrates and/or repairs and monitors and/or installs and diagnoses equipment, systems, and/or assemblies. Works from guidelines and standardized procedures/instructions. May design/build tools.
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We are seeking an experienced Server Platforms Validation Sr.Engineer with deep expertise in Linux, Hyper-V, Proxmox, servers, storage systems, and datacenter operations. This role requires advanced technical knowledge to configure systems based on customer requirements and to troubleshoot and resolve complex Proxmox and Hyper-V issues.
The position involves direct coordination and collaboration with technical personnel across multiple specializations. The environment is fast-paced with high expectations for quality, communication, and turnaround time.
Candidates must demonstrate extensive experience with virtualization technologies, firmware patching, and Linux environments.
Work and interact with a wide variety of NI staff in R&D software and hardware organizations, as well as employees from other business groups, in Austin, Texas, Debrecen, Hungary and Penang, Malaysia.
Validate automated test solutions (using Gage R & R, as well as other methods) for the manufacture of test and measurements instruments and hold required reviews to assure test system readiness for product release.
Full ownership of test solutions after deployment on production floor. Ensure test solutions owned are in good condition and readily available for NI Operations and Services.
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Work and interact with a wide variety of NI staff in R&D software and hardware organizations, as well as employees from other business groups, in Austin, Texas, Debrecen, Hungary and Penang, Malaysia.
Validate automated test solutions (using Gage R & R, as well as other methods) for the manufacture of test and measurements instruments and hold required reviews to assure test system readiness for product release.
Full ownership of test solutions after deployment on production floor. Ensure test solutions owned are in good condition and readily available for NI Operations and Services.
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Reliability Analysis (EMIR): Perform rigorous Electromigration (EM) and IR Drop analysis to ensure long-term reliability and power integrity of high-current density paths.
Physical Verification: Execute and resolve complex DRC, LVS, ERC, and Antenna violations to ensure 100% tape-out readiness.
Block-Level Execution: Lead high-quality custom layout for various blocks, including SerDes (TX/RX), PLL, ESD, Mixed-Signal IO, and Digital Blocks.
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Undertake the roles of a custom layout engineer in realizing the physical implementation of a variety of circuitries, including Foundation IP (Standard Cells, Memory Compilers, IO/ESD), Analog IP, and RF building blocks.
Be responsible for tasks assigned and assume full responsibility of the complete layout implementation process, including floorplanning, layout construction, physical verification and QA flow sign-off.
Provide timely project status updates and proactively anticipate potential execution pitfalls to ensure high-quality and on-time delivery for each project.
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Use industry standard electrical design tools to design, simulate, and verify board level analog circuits for test and measurement applications, including: Linear power supplies
Switched mode power supplies (DC–DC)
High precision/highspeed analog front ends (including ADCs, DACs, amplifiers)
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Perform gate level netlist to GDS design independently including but not limited to floor planning, place & route, close tree synthesis, timing sign off and physical verification.
Perform design IP Implementation, IR drop analysis, DFT, STA and foundry merge.
Work with manager to achieve assigned tape out target.
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Responsible for Physical Design tasks at block or subsystem level. The tasks will include Floorplanning, Synthesis, Placement, CTS, Routing, Static Timing, Physical Verification, Formal Equivalency, Power Efficiency, IR-Drop, and EM.
Owning the entire process from SYN to PNR using Synopsys Fusion Compiler. Crafted the convergence recipe & design collateral to meet project requirement.
Run signoff flow including PV, extraction, STA, VCLP, FEV and EMIR, analyse the violation and converge the design.
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Responsible for Physical Design tasks at block or subsystem level. The tasks will include Floorplanning, Synthesis, Placement, CTS, Routing, Static Timing, Physical Verification, Formal Equivalency, Power Efficiency, IR-Drop, and EM.
Owning the entire process from SYN to PNR using Synopsys Fusion Compiler. Crafted the convergence recipe & design collateral to meet project requirement.
Run signoff flow including PV, extraction, STA, VCLP, FEV and EMIR, analyse the violation and converge the design.
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