Perform gate-level netlist to GDSII implementation, including floorplanning, placement & routing, clock tree synthesis (CTS), timing sign-off, and physical verification.
Support LIMS masterdata update and improvement projects (site & global), including LIMS change assessment and liaise with global personnel for the change implementation
We are looking for a C# Software Engineer to work at our new automated R&D and production facility in Singapore. As a new business in Singapore the right candidate will have the opportunity to grow as the company does, working at the forefront of AI & automation in the pharmaceutical and chemical synthesis industry.
- Experience with AWS deployment, Terraform, Docker, or similar cloud infrastructure tools would be advantageous. Candidates with exposure to CI/CD pipelines, cloud-native architecture, or container orchestration will be particularly valued.
Develop AI Training Content: Create detailed prompts in various topics and responses to guide AI learning, ensuring the models reflect a comprehensive understanding of diverse subjects.
Develop AI Training Content: Create detailed prompts in various topics and responses to guide AI learning, ensuring the models reflect a comprehensive understanding of diverse subjects.
Develop AI Training Content: Create detailed prompts in various topics and responses to guide AI learning, ensuring the models reflect a comprehensive understanding of diverse subjects.
Develop AI Training Content: Create detailed prompts in various topics and responses to guide AI learning, ensuring the models reflect a comprehensive understanding of diverse subjects.
Develop AI Training Content: Create detailed prompts in various topics and responses to guide AI learning, ensuring the models reflect a comprehensive understanding of diverse subjects.
AI-Powered Testing Support: Leverage AI-powered testing tools (e.g., test case generation, visual regression detection, anomaly detection) to increase test coverage and reduce manual effort.
Responsible for the circuit design, simulation, and verification of key analog/mixed-signal modules for 3D-NAND memory, including but not limited to: 1) XDec/Page buffer/Datapath design and optimization. 2) High-Voltage (HV) Charge Pump/PUMP architecture design to meet multi-voltage domain, high efficiency, and low noise requirements. 3) High-voltage switch (HV Switch) and HV level shifter design to support >20V high-voltage operation. 4) I/O interface circuitry (including ESD protection, drive capability matching, and signal integrity optimization).