Kerja Sepenuh Masa, Senior Staff -Principal Engineer di Cognitive Design Technology Pvt Ltd - Maukerja

We are seeking an experienced Senior Staff Engineer / Principal Engineer – Physical Design to lead and execute advanced semiconductor physical design activities for complex SoCs and high-performance digital ICs.

Role: Senior Staff / Principal Engineer – Physical Design 

Location: Singapore

Experience: Minimum 10 Years

Employment Type: Full-Time

• Citizenship Requirement: Singapore Citizen or Singapore Permanent Resident (PR) – Mandatory

Physical Design Implementation

• Lead end-to-end RTL-to-GDSII implementation for complex SoCs and digital IPs.
• Drive floor planning, power planning, placement, clock tree synthesis (CTS), routing, and physical optimization.
• Own timing closure across multiple process, voltage, and temperature (PVT) corners.
• Optimize designs for power, performance, and area (PPA).
• Perform congestion analysis, signal integrity analysis, and design optimization.
• Drive physical design signoff activities, including timing, signal integrity, and power integrity.

Static Timing Analysis and Signoff

• Perform static timing analysis (STA), setup/hold analysis, and timing ECOs.
• Resolve complex timing violations, including crosstalk, SI-related issues, and high-fanout net problems.
• Analyze and optimize multi-mode, multi-corner (MMMC) timing scenarios.
• Review and sign off timing reports, parasitic extraction results, and implementation quality.

Physical Verification and Reliability

• Work closely with physical verification teams to resolve DRC, LVS, and antenna violations.
• Support IR-drop, electromigration (EM), and power integrity analysis.
• Ensure implementation compliance with foundry design rules and technology requirements.
• Drive physical design quality and signoff readiness.

4. EDA Tools

Experience with one or more of the following tools is required:

• Cadence Innovus
• Synopsys IC Compiler II
• Synopsys Fusion Compiler
• Synopsys PrimeTime
• Cadence Tempus
• Parasitic extraction and physical verification tools

5. Educational Qualifications

• Bachelor’s or Master’s degree in Electrical Engineering, Electronics Engineering, VLSI Design, Microelectronics, or a related discipline.

6. Experience Requirements

• Minimum 10 years of hands-on experience in semiconductor physical design.