Kerja Sepenuh Masa, Senior IC Design (R-D) di ASEM - Advanced Semiconductor Academy Of Malaysia Federal Territory - Maukerja

Job Description: Senior IC Design Engineer / Technical Lead

Organisation: Advanced Semiconductor Academy of Malaysia (ASEM)

Position: Senior IC Design Engineer / Technical Lead

Department: Semiconductor Technology & Talent Development

Location: Selangor, Malaysia

Job Summary

We are seeking an experienced Senior IC Design Engineer / Technical Lead to oversee ASEM’s technical operations, including EDA license management, semiconductor R&D coordination, university tape-out collaborations, and IC design curriculum development.

The successful candidate will bridge industry, academia, and training institutions to ensure ASEM’s technical infrastructure, R&D initiatives, and talent development programmes remain aligned with industry requirements.

Key Responsibilities

1. EDA Tools & License Management

* Oversee the management, allocation, renewal, and utilisation of EDA software licenses, including Cadence, Synopsys, Siemens EDA, and other relevant tools.

* Coordinate with EDA vendors on licensing agreements, technical support, software updates, and training.

* Monitor EDA usage across ASEM facilities, training programmes, industry partners, and universities.

* Ensure EDA infrastructure, computing resources, and technical environments support training and R&D activities.

* Optimise license utilisation and recommend cost-effective solutions.

2. Semiconductor R&D & University Collaboration

* Coordinate semiconductor R&D initiatives involving universities, industry partners, and IC design companies.

* Identify opportunities for joint research, IP development, chip design projects, and commercialisation.

* Facilitate technical discussions between researchers, engineers, and industry partners.

* Monitor project milestones, technical deliverables, and research outcomes.

* Support the development of collaborative R&D programmes aligned with Malaysia’s semiconductor ecosystem.

3. Tape-Out & Chip Design Project Coordination

* Coordinate IC design and tape-out projects with universities, foundries, MPW service providers, and industry partners.

* Support the planning and execution of chip design projects from RTL/design development to GDSII submission.

* Coordinate access to PDKs, EDA tools, IP libraries, and foundry requirements.

* Monitor tape-out schedules, design verification, DRC/LVS, sign-off requirements, and submission readiness.

* Facilitate communication among design teams, universities, foundries, and technical service providers.

* Coordinate post-silicon testing, validation, and project documentation where applicable.

4. IC Design Curriculum Development & Review

* Develop, review, and continuously improve semiconductor training curricula to meet industry hiring requirements.

* Cover key technical areas including:

* Digital IC Design (RTL, Verification, Synthesis)

* Physical Design (RTL-to-GDSII)

* Analog & Mixed-Signal IC Design

* SoC Design, RISC-V, and AI Accelerators

* DFT, STA, and Design Sign-Off

* Work with industry experts, universities, and trainers to ensure course content reflects current semiconductor technologies.

* Develop hands-on lab exercises, design projects, assessments, and industry-based capstone projects.

* Evaluate training effectiveness and recommend curriculum improvements.

5. Technical Training & Teaching

* Conduct technical lectures, workshops, laboratory sessions, and masterclasses for IC design trainees.

* Provide technical guidance and mentorship to junior engineers, trainers, and students.

* Supervise student design projects, including RTL development, verification, physical implementation, and tape-out preparation.

* Review students’ technical competencies and project deliverables.

* Support train-the-trainer initiatives to strengthen ASEM’s internal teaching capabilities.

6. Technical Advisory & Industry Engagement

* Act as ASEM’s technical representative in discussions with universities, EDA vendors, foundries, and semiconductor companies.

* Advise management on emerging semiconductor technologies, EDA infrastructure needs, and technical investment priorities.

* Support the evaluation of new technical partnerships, training technologies, and research opportunities.

* Prepare technical reports, project updates, and recommendations for management.

Requirements

Education

* Bachelor’s or Master’s degree in Electrical & Electronic Engineering, Microelectronics, Semiconductor Engineering, Computer Engineering, or related fields.

Experience

* Minimum 7–10 years of relevant experience in semiconductor or IC design.

* Strong understanding of digital or analog IC design workflows, preferably with practical RTL-to-GDSII experience.

* Hands-on experience with industry-standard EDA tools such as Cadence, Synopsys, or Siemens EDA.

* Familiarity with foundry processes, PDKs, MPW programmes, and tape-out procedures.

* Experience in technical training, curriculum development, or university-industry collaboration is an advantage.

* Strong project coordination, stakeholder management, and communication skills.

Key Performance Indicators (KPIs)

1. EDA Management: Effective license allocation, utilisation, renewals, and technical support.

2. R&D Coordination: Successful delivery of collaborative semiconductor R&D projects with universities and industry.

3. Tape-Out Projects: Timely coordination and completion of planned chip design and tape-out milestones.

4. Curriculum Development: Regular review and improvement of IC design training programmes.

5. Technical Training: Successful delivery of technical sessions and supervision of student design projects.

6. Industry Collaboration: Development and maintenance of technical partnerships with universities, foundries, and EDA vendors.

Ideal Candidate

We are looking for a technically strong IC design professional who enjoys working beyond conventional chip design roles. The ideal candidate combines hands-on semiconductor engineering knowledge with technical project management, teaching capabilities, and university-industry coordination skills.

This role is suitable for an experienced semiconductor engineer who wants to contribute to Malaysia’s semiconductor talent development, research ecosystem, and chip design capabilities.